To verify the design concept, two Gen IV devices were chosen to confirm efficiency improvement. SiRA14DP was chosen for the high-side MOSFET and SiRA04DP for the low-side MOSFET in a synchronous buck. The SiRA14DP effectively improve the efficiency for high-side MOSFET. When compared to a Gen III SiR330DP, the SiRA14DP is able to increase efficiency at 10 A to 15 A range and full load. When using a SiRA04DP for low-side MOSFET, the efficiency at lighter load improved 1%, or higher, from the SiR818DP due to lower Qg and Qgd. This high efficiency trend leads to 10% or more current handling capability and increases power density. In summary, the evolution to Gen 4 showed significant efficiency improvement over the previous generation. The result also showed superior efficiency over competitive charge-balanced devices. This duty cycle and test setup particularly reflect the efficiency of high current DC-DC  converters for CPU core and DDR memory.