The F28M35x has two dedicated message RAM blocks, each being two kilobytes in length. Unlike the shared SRAM blocks, these blocks provide communication in one direction only and cannot be reconfigured. The first of the two blocks is the master to control, or MtoC. This block can be read or written to by the M3 and read by the C28, providing a method of communication from the M3 to the C28. The second block is the control to master or CtoM. This block can be read or written to by the C28 and read by the M3, enabling communication from the C28 to the M3. After the sending CPU writes a message, it can inform the receiving CPU via interrupt or flag that the message is available. This process will be discussed in greater detail later in this presentation.