There are up to eight blocks of shared SRAM on an F28M35x device. These shared SRAM blocks are typically used by an application; however, they can also be used for transferring messages and data. Additionally, each block can be individually owned by either the master subsystem or the control subsystem. Upon reset, the master subsystem owns all of the shared SRAM blocks. In this default configuration, the master subsystem can freely use the memory blocks; the M3 core can read, write, or execute from the blocks and the micro DMA can read or write. On the control subsystem side, however, the C28x and C28x DMA can only read from these blocks. Blocks owned by the master subsystem can be used by the M3 to send messages to the C28; this is referred to as MtoC, or master to control. After a reset, the M3 application can assign ownership of blocks to the control subsystem. In this configuration, the control subsystem can freely use the block; the C28x is able to read, write, or execute from the block and the master subsystem can only read from the block. Blocks owned by the control subsystem can be used to send messages from the C28 to the M3; this is referred to as CtoM, or control to master. For safety, shared memories can be further configured to disable master DMA write and/or CPU write and/or CPU execution.