The figure in this slide is of a typical I²C bus with the master device, which is typically a processor, and multiple slave devices linked to the I²C bus, each possessing a unique I²C address. The I²C bus supports a maximum bus capacitive load of 400pF. This load includes all I²C devices as well as trace lengths. As the system block diagram illustrates, there are many different devices that can connect to the I²C bus. TI has products and content in all of the areas shown in either red or blue, but this presentation will be highlighting the products shown in blue.