This slide shows the positioning of the STM32 F0 performance within the rest of MCU portfolio. The STM32 F0 system architecture guarantees high real-time performance by multiplying the possibilities of bus access to SRAM, Flash, peripherals, DMA. The 5-channel DMA mapped on eleven peripherals allows Flash execution in parallel with DMA transfer, making it possible to reach 38 Drystone MIPS at a 48 MHz CPU frequency.