The AD Data registers store the results of the ADC conversion. The 12-bit data can be right aligned or left aligned depending on settings in the control registers. The A/D converted value addition mode adds multiple conversions of a channel and the result is stored as a 14-bit result which is always left aligned. Unused or padded bits in the result are always zero so there is no need to mask the extra bits. The reset value of the registers is zero.