Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Product List
Serial GPIO Peripheral Slide 9

Here is a more detailed comparison of bit banging versus the SGPIO acceleration. Suppose the user outputs a 32 bit repeating data stream. The top diagram shows that with the bit banging method, every bit of data needs the CPU’s attention to set the output high or low. With the same 32 bit repeating data stream, the bottom diagram shows that the CPU only needs to manage the 32 bit data buffer at the beginning and the end of the data shifting. Also introduced here, is an additional feature of the SGPIO interface: slice concatenation. Concatenating slices allows a bigger buffer to be created as is shown in the bottom diagram item where two 32 bit buffers are concatenated to one 64 bit buffer. The CPU’s involvement in this interface is further reduced as the CPU is free to attend to other tasks while a longer buffer is being automatically handled by the SGPIO interface. The available examples described earlier in this training provide the ability to estimate the potential resources needed to implement a proprietary interface.

PTM Published on: 2014-05-15