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Serial GPIO Peripheral Slide 4

Here are some examples of standard interfaces that are common to microcontrollers in the market today. Everybody is familiar with SPI, PWM, I2S, UART, and so on. Many design engineers have run into the situation where they just hope the controller can have just one more of a certain interface or SPI bus. With NXP’s SGPIO interface, users can save the coding & debugging time of creating their own software interface, and keep the CPU’s processing power freed up for higher priority tasks. An application note for the LPC4300 series microcontroller is available on NXP’s lpcware.com web site. This app note provides documentation and source code for SGPIO emulation of the SPI communication interface. Configuration of master or slave mode, clock polarity, data sampling phase, slave select, and data transfer size from 4 to 32 bits are supported. Five SGPIO slices are needed to support this application note’s implementation of SPI master signals including serial clock master, slave select, MISO, and MOSI. The complete example implements both a master and slave SPI which loop back the data being transferred. Therefore, designs needing either master, slave, or both can be modeled on this example.

PTM Published on: 2014-05-15