Shown here the engineer is comparing two buck converters. The black line shows the efficiency of a discrete implementation, while the blue line indicates the efficiency of the integrated solution. At 1MHz there is a slight efficiency advantage to the discrete implementation at higher current due to the lower on-resistance of the discrete lower FET. The EPC2023 has a typical RDS(on) of 1mΩ compared with the lower FET in the EPC2100 half bridge of 1.5mΩ. However, as the frequency cranks up to 4MHz, the reduced parasitic inductance coupled with the improved device layout and technology gives the full-range advantage to the monolithic device.