Shown here is the family table displaying the resources of the family, arranged from the smallest density device at the top and the largest density at the bottom. From 2,000 user logic elements, an ample amount of logic resources for the majority of control plane, simple glue logic functions all the way up to 50,000 logic elements. There is an ample amount of on-chip RAM and FLASH memory along with 18 x 18 multipliers that can be used for massively parallel DSP processing for things like filtering or image processing. High performance, low-jitter PLLs and global clock networks provide lots of on-chip clocking resources. The number of PLL’s available is dependent on the package option, lower pin-count packages only have 1 PLL, F256 or higher pin-count packages have the maximum number of PLLs available. Not shown here in the table but the number of global clocks available is either 10 or 20 (10M02-08 devices have 10 clocks, the 10M16-50 devices have 20 clocks). All of the devices are self-configured and store the device image(s) within secure, integrated FLASH (this is NOT die stack). Another first for Intel® is the inclusion of on-chip analog blocks. The customer can get either one or two ADC blocks and one temperature sensing diode. As mentioned before, the larger density devices have on-chip optimization to enable I/O interfaces to external double data rate SDRAM memories.