A large number of customers have completed designs targeting simple CPLDs. For those engineers who want to add more functions or features, migrating to the MAX® 10 FPGA is a great way to move into the FPGA architecture but retain many of the benefits of CPLDs, low-cost, easy to design, and easy to debug. Shown here in both graphical and tabular formats, a simple CPLD design is compared to a more complex design based on the MAX® 10 FPGA, providing options to significantly increase the functionality of typical electronic systems. Engineers even have the option to add “smart” capability with the Nios® II 32-bit embedded processing soft IP core, which could augment or replace microcontroller functionality but where the flexibility or performance of programmable logic is needed.