SPI provides full duplex synchronous serial communication between master and slave devices. SPI uses separate lines for data and clock to sync both sides. The data from the master or the slave is synchronized on the rising or falling clock (SCK) edge. Both master and slave can transmit data at the same time. SPI is extremely popular since a simple shift register can be used to receive the data rather than a UART as required for asynchronous transfer. For SPI, only one side generates the clock and this is designated the master. Usually this is the microcontroller. There is only one master but there can be multiple slaves connected either independently or in a daisy chain. The Master uses the MOSI (master out slave in) line to send data out. If the slave needs to send data back it will use the MISO line after a specified number of clock cycles. This works well for typical SPI applications such as data transfer from a sensor where the command structure is well defined. When used in an embedded system the SPI bus allows for a reduction in board space, power consumption and total system cost since it requires fewer wires than parallel flash memories.