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Telecom Point-of-Load Solution Slide 10

Power Stack employs a vertical stacking technique of applying the high-side and low-side NexFET die onto the leadframe. The high-side NexFET is connected to the power input terminal through a copper clip, while its bottom side is soldered onto a larger copper clip, which is the converter switching node (the connection to the output inductor). The switching node copper clip is soldered to the top of the low-side NexFET die, and the bottom of the low-side NexFET die is soldered to the QFN package leadframe. This vertical metal-on-metal connection results in a very short power and heat transfer path. Power Stack uses no bond wires between the FET die that would generate parasitic inductances. This allows higher operating frequency, and higher power density without a trade-off in efficiency. For more information on the power block please visit the TI website and download app note SLPA009A: “Power Loss Calculation with CSI Consideration for Synchronous Buck Converters”. To simplify design efforts, the app note also has a link to a complementary design calculator tool, SLPC015.

PTM Published on: 2012-05-07