In this timing diagram one can see the functionality of the timer in Interval Timer Mode. After setting up the timer and starting it with the timer enable bit and the timer start trigger, the TCR register is pre-loaded with the value written to the TCR register. In this mode the TR register is counting down and if an underflow occurs or zero is reached then an interrupt is generated and the output is toggled - if enabled. Note the interval time is determined by the value of the TDR register plus one. Additionally, there are shadow registers for each TDR register so that the value of the TDR register can be re-written independently of the state of the internal timer. The next time the timer underflows, the new value will be written to the real TDR register automatically.