This module will now take a look at some issues that arise in some real-world applications. These are topics that are frequently discussed in the part selection process and are presented here from the perspective of the protected circuit. The first issue to consider is the let through voltage which is the actual voltage the protected circuit will experience during a surge event. While similar to VS, the peak value will depend on the actual rise time of the event as well as the board layout. It is always best to remember two things about the position of the SIDACtor on the board. Number 1, the SIDACtor should be placed as close as possible to the connector that brings the protected line to the board. This minimizes the propagation of the signal to other traces on the board and maximizes the board trace inductance between the SIDACtor and the protected circuit. Number 2, the SIDACtor should be situated so that the surge must pass directly under the SIDACtor on the way to the protected circuit. Placing the SIDACtor on a stub line will raise the let-through voltage and may introduce unwanted impedance mismatches on the signal line.