It can be shown that the point of diminishing returns occurs when P is 3 bits more than D, that is, when the map input bus width is 3 bits wider than its output bus width. This slide details why P must be at least 3 bits greater than D. It stems from the fact that the map must guarantee half LSB (least significant bit) accuracy, or better, at the zero crossing point of the sinusoid where its slope is steepest. On the left is the graphical representation of the problem. First, define P as D plus n, where n is the number of bits in excess of D. This defines the problem as finding the smallest n that ensures the blue trace in the red box spans less than one half LSB vertically when the horizontal span is 1 LSB, that is, 1 step of angle resolution results in less than a half step of amplitude error at the zero crossing point. Having defined n as a number of bits in excess of D, the math leads to the given inequality n greater than or equal to log-base-2, etcetera. Changing this to an equation rather than an equality and calculating n for various D, the plot shown on the bottom right of the slide is given. Because n must be an integer, the plot shows that 3 is the smallest integer satisfying the inequality involving n regardless of D.