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F1680 Series Slide 9

The F1680 Series devices feature a rich array of communication peripherals including 2 LIN UARTs (Master/Slave), one Enhanced SPI (ESPI), an on-chip debugger, and an I2C (master/slave) controller which ensures that the microcontrollers are bus-compatible with the I2C protocol. The ESPI supports the SPI interface and other synchronous serial interfaces modes such as I2S (Inter IC Sound) and TDM (time division multiplexing). Finally the on-chip debugger uses the DBG pin for communication with external hosts and provides a rich-set of debugging capabilities such as reading and writing registers, programming Flash memory, setting break points, and executing code.

PTM Published on: 2011-04-28