Field-programmable gate arrays (FPGAs) are used in a wide variety of applications and end markets, and they have been gaining market share over ASICs due to the excellent design flexibility and low engineering costs. Power-supply design and management for FPGAs is an important part of the overall application. FPGAs have several voltage rails to consider. As semiconductor process technology advances, the required voltage levels decrease and the tolerance becomes tighter. Many of the FPGAs require a tight 3% total accuracy to meet the core voltage specification. From a power supply standpoint, this specification is required over reference voltage, input voltage, temperature and load transient variations. These details will be explored later in the presentation. Some FPGAs require only a 5% total accuracy. With a 1 V output from a DC/DC converter, this represents 30 mV at 3% or 50 mV at 5% variation. Recently released DC/DC converters have a much easier time meeting tight specifications versus older DC/DC converters that may have been selected for reuse. So, it is important to pay attention to the voltage regulation as well as the output voltage. Fortunately, some of the rails can be tied together to limit the number of voltage regulators. Analog voltages for on-board Phase-Locked-Loops (PLL) are best suited with low noise LDOs. Analog circuits are sensitive to noise on the voltage and low noise LDOs with high power supply ripple rejection are good choices.