The watchdog timer has 2 operating modes. The user chooses which mode they want to use by changing the timer mode select bit in the TCSR register. The first mode is watchdog timer mode. In this mode, when the watchdog timer overflows, the WDTOVF signal is output and an internal reset can be generated. Whether or not a reset is generated depends on the setting of the ‘reset enable’ bit in the RSTCSR register. The other mode is Interval Timer mode. In this mode the watchdog timer generates the watchdog overflow interrupt every time an overflow occurs. There is no option for the watchdog to reset the MCU in this mode.