This slide will cover some usage notes for the CMT peripheral. First, the user should always remember to bring each unit of CMT that they are using out of the module stop state. This is done by clearing the bit in the module stop control registers that corresponds to the CMT unit that is being used. Please refer to the Low Power Consumption section of the RX group’s hardware manual to see which bits should be cleared. If this bit is not cleared then the CMT peripheral will be disabled and its registers will not be writable. The second note has to do with writing to the count register CMCNT. When the timer is running, writing to the count register at the instant of a compare match event will be ignored, and the count will be cleared to zero. If writing to the count register occurs at the same time as a count clock is present, the newly written value will be used and the count clock will be ignored. Finally writing the same value to count register CMCNT and the compare register CMCOR can result in an interrupt being generated if the CMIE interrupt enable bit is set even if the timer not running. Also writing the same value to both registers will cause the counter register to be reset to zero as the match has technically occurred.