This slide lists additional meaningful features of the QN908x like the multiple timers, various interfaces, and 32 MHz Cortex-M4F. The ARM Cortex-M4 includes one AHB-Lite bus, one system bus, and I-code and D-code buses. Separate buses are dedicated for instruction fetch (I-code) and data access (D-code). The QN908x uses a multi-layer AHB matrix to connect the ARM Cortex-M4 buses and other bus masters to peripherals in a flexible manner. It optimizes performance by allowing peripherals that are on different slave ports of the matrix to be accessed simultaneously by different bus masters. Additional system features include fully integrated DC-DC and LDO, low power sleep timer, battery monitor, 16-bit high resolution general purpose ADC, and GPIOs to further reduce overall system size and cost. QN908x operates with a power supply range of 1.62 V to 3.6 V and has very low power consumption in all modes. The best in-class active current with low power sleep modes gives excellent battery life, allowing operation from a coin cell battery. It enables long lifetime in battery-operated systems while maintaining excellent RF performance.