Note also the dual port DMA SRAM. This allows both the DMA and CPU to access a portion of the total data RAM, simultaneously. dsPIC33 devices typically contain a 2kB dual port RAM buffer area. Each DMA channel can select one of a number of peripheral interrupts to initiate a data transfer. Once a peripheral to memory transaction starts, the DMA controller can read from a peripheral on the DMA bus and then write that data to the DMA port of the dual port DMA SRAM. For a memory to peripheral transaction, the DMA controller will read from the dual port DMA SRAM and then write that data to the peripheral. A DMA channel can move words or bytes. I can mode blocks of up to 1024 data elements. When the channel completes moving a block, it can generate an interrupt to signal the software that the block is ready for processing.