As mentioned earlier, newer receivers incorporate a full failsafe function that ensures a logic high output when the receiver inputs are floating or shorted together. A practical use for the failsafe shorted function is in multi-point networks with the previously described idle state issue. A full failsafe receiver connected to an idle and terminated bus interprets the 0V differential voltage as a logic 1, so the receiver output properly registers the idle state. Recognizing 0V as a valid logic level eliminates the need for bus biasing, thus simplifying the design. Failsafe with the inputs shorted is implemented by redesigning the comparator stage to include a 0V differential as a logic high level. This is accomplished by setting the receiver high threshold slightly below GND. This way the 0 V differential present on an undriven, terminated bus represents a valid high level, so the Rx output properly remains in the high, idle state as the bus collapses. Note that implementing full failsafe cuts down the size of the switching region, so the hysteresis is smaller and this results in less noise immunity.