Jitter is caused by changes in transition timing due to bit patterns and cable capacitance which in turn depends on the cable length and cable type. Jitter is evaluated via an “Eye Diagram”. Here a PRBS (Pseudo Random Bit Stream) generator sends large quantities of varying bit patterns across a data link. The charge and discharge characteristics of the cable capacitance are recorded for each bit pattern and then superimposed onto one another yielding the eye diagram. The jitter budget is commonly given as a percentage and defined as: Jitter (%) = 100 · Jitter width (s)/Bit width (s) with typical Jitter goals ranging from 10% to 20%. For example: a transmission cable presents a capacitive load to the driver output. Thus, long sequences of 1s or 0s will charge or discharge this capacitance to a higher voltage than just a single 1 or 0 bit. Data errors can occur when a single bit of a certain polarity follows a sequence of consecutive bits of opposite polarity. Depending on the cable capacitance the single bit might not be able to charge or discharge the capacitance sufficiently in order for the bus voltage to cross the receiver input threshold level. When this happens, the receiver input will not be triggered and the information of the single bit status is lost. Because cable capacitance increases with cable length, for a given data rate the signal jitter and bit error rate will increase. There are two options to reduce jitter and the associated bit error rate: either by reducing the data rate or cable length, or by encoding the data stream such that long sequences of 1s and 0s are converted into a clock-like signal, which charges and discharges the cable capacitance more equally and therefore generating more consistent signal amplitudes.