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Clock management or clock gating allows the designer to turn peripherals on or off to minimize power consumption by using only the features needed. This pie chart shows by using the system clock gating registers, Run IDD current can be reduced up to 33%. Clock gating is the mechanism used to disable the clock tree to any unused peripheral bus or peripheral clock to all modules, regardless of if they are enabled or not. It also saves power by not clocking unused gates.
PTM Published on: 2011-10-11