If the ESR on the output capacitor is eliminated, which is very typical of modern ceramic capacitors, another zero must be added to the control loop. This is called “type three” compensation. By placing a capacitor across the high side feedback resistor, a zero is created at a frequency determined by R1 and the feet forward capacitor (Cff). As the frequency gets high enough such as the capacitors impedance is effectively zero, another pole is created. The cross over frequency of the system should be designed between the zero and pole to provide a stable system. As VOUT approaches VREF the benefit of this method reduces. This is because the zero approaches the pole pair and they effectively negate each other.