A system like this allows feature updates to end products by adding or subtracting more sensors. This does not impact the main processor in the system. In a typical system if example sensor F had to be added, as well as a complimentary AFE going to the host processor, software updates on the host processor side would be required. Now, the host processor has to have knowledge of the fact that a new type of sensor has been added, what type of sensor it is, what type of data is coming out of it, and how to process that data. However, in the world of a dedicated PSoC analog coprocessor, that new sensor F would be added to the analog coprocessor, which would then do the job of processing that data, making meaningful sense out of it, and simply sending out that preprocessed data, to the host processor. So, almost no changes occur, and at the very max, incredibly minimal changes to the host processor side, because all that is being done is opening up another channel to receive, preprocessed sensor data, as opposed to changes to the host processor which are extremely dangerous in a late cycle in embedded design. Not only is time and money being saved, but also risk of production is being reduced as well as a lot of engineering time.