Synchronous Serial Interface (SSI) is typically a synchronous simplex one-way master-slave communication protocol that uses differential signaling with only a clock and data line to communicate from the host to the slave with no use of a chip select. However, this section will describe the variation of SSI specifically used with the AMT23 absolute encoder series. The 3-wire SSI allows for a system that looks a lot like an SPI bus. In this communication protocol, the host asserts a chip select line to let a slave know it is being accessed, and then controls the clock line, receiving data on the DATA line. The difference here from SPI is that there is no command being sent, the slave does not have the ability to accept commands, and it only ever responds with its current position. This information is unidirectional making it a simplex communication protocol. The signals in this variant of SSI are not differential. Differing yet again from SPI, the SSI transmission is not constrained to individual bytes. As users will see in the illustration on this slide, data for the 14-bit encoder is sent as 16-bits (14 position bits and 2 check bits). A 12-bit encoder only sends a total of 14-bits (12 position bits and 2 check bits). Referencing the SPI waveform again one will see that the idle state of the clock line differs from SSI. With SSI the clock is high while idle, goes low at the beginning of an access, and then data is captured on the rising edge of the clock. Because of this, the SSI encoder will not be compatible with most SPI hosts.