Designers continue to develop communication systems that vertically integrate complex data, video and voice. As these technologies advance, the need for high-speed information transfer rates increase to enable efficient communication flow over existing infrastructure. To support this demand, equipment manufacturers require high frequency reference clocks that are accurate (maximum ±50 ppm), maintain fast transition times (0.5 ps typical) and have low noise jitter performance (<1 ps RMS over 12kHz to 20MHz bandwidth). To achieve this performance, applications may employ LVPECL or LVDS technology. The above example of the large router line card contains a reference clock block that may be supported with CTS Models 635 and 658. Requirements will vary based on the system architecture and chipset requirements used in a given design approach.