A single CMOS switch or a single channel of a CMOS multiplexer essentially consists of an N-channel and a P-channel MOSFET transistor in parallel as outlined in this diagram. The respective drains and sources of the two transistors are tied together to become the switch terminals while the gates of the two transistors are driven to control the on/off action of the switch. Essentially, the N-channel is on for positive gate-to source voltages and off for negative gate-to-source voltages while the P-channel is vice versa. With a fixed voltage on the gate, the effective drive voltage for either transistor varies in proportion to the polarity and magnitude of the analog signal passing through the switch. In the illustration where RON, the resistance of the on switch, is plotted against applied analog switch voltage, VS or VD, the resistance of the N-channel increases with positive voltage and the resistance of the P-channel increases with negative VS or VD. The resultant parallel combination of these two characteristics results in the well-known crown or twin-peak characteristic. This variation in on-channel resistance with input signal is termed RON modulation, and the actual spread of maximum channel resistance to minimum channel resistance over the signal swing of interest is represented by delta RON.