This slide demonstrates the use of the standard and alternate DDS equations. The system clock frequency, Fs, is defined as 500 MHz and the accumulator bus width, N, as 32 bits. To use the standard DDS equation it is necessary to know the value of the FTW in addition to Fs and N. In the example shown FTW equals 1,000,000. Substituting these values of Fs, N and FTW in the standard DDS equation yields a DDS output frequency of approximately 116,415.32 Hz. To use the alternate DDS equation it is necessary to know the desired DDS output frequency, Fo, in addition to Fs and N. In this example Fo equals 10MHz. Substituting these values of Fs, N, and Fo in the alternate DDS equation yields an FTW of 85,899,346. This choice of Fo means that the quantity 2^N times the quantity Fo over Fs is not an integer. Therefore, the actual DDS output frequency is not exactly 10MHz. To determine the error, use the standard DDS equation with an FTW value of 85,899,346 to calculate the actual DDS output frequency. Doing so yields a value of approximately 10.00000000931MHz or an error of 9.31mHz or 0.000931ppm. This is very close to the desired value of Fo, but not exact.