Raspberry Pi RP2040 Microcontroller Now Available

2021-06-01 | By Nate_Larson

Back in January of this year, the Raspberry Pi Foundation took the world by surprise when they deviated from their history of Broadcom based single-board-computers and released the Raspberry Pi Pico development board. A board that featured an RP2040 microcontroller designed by Raspberry Pi themselves; their first foray into silicon design.

Raspberry Pi RP2040 Microcontroller Now Available

Originally the RP2040 was only available by purchasing the Pico board, but soon, key manufacturing partners, such as Adafruit, Arduino, Pimoroni, and SparkFun, were provided chips to begin creating their own development boards as well. This expanded the programming possibilities from the original MicroPython and C/C++ to include CircuitPython and Arduino IDE support, allowing users at any level of experience to get started with the RP2040.

Now having had time to ramp production, Raspberry Pi is making the RP2040 microcontroller IC available to the broader electronics market. In the current climate of chip shortages, the introduction of a new MCU option is a welcome addition!

Raspberry Pi RP2040 Microcontroller Now Available

Keep in mind, however, that this is no ordinary 32-bit microcontroller. With a dual ARM Cortex-M0+ processor core running at 133MHz, 264kB of SRAM memory onboard, and support for up to 16 MB of Flash memory, it is a great choice for demanding applications. But what really sets it apart is the augmentation of its rich peripheral set with the unique Programmable I/O (PIO) subsystem. PIO is programmable in the same sense as a processor. There are 2 identical PIO blocks in RP2040 with four state machines each, that can independently execute sequential programs to manipulate GPIOs and transfer data. These state machines' inputs and outputs are mapped to 30 GPIOs, and all state machines have independent, simultaneous access to any GPIO.

Overall RP2040 features include:

Dual ARM Cortex-M0+ @ 133MHz
264kB on-chip SRAM in six independent banks
Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus
DMA controller
Fully-connected AHB crossbar
Interpolator and integer divider peripherals
On-chip programmable LDO to generate core voltage
2 on-chip PLLs to generate USB and core clocks
30 GPIO pins, 4 of which can be used as analog inputs
Peripherals

2 UARTs
2 SPI controllers
2 I2C controllers
16 PWM channels
USB 1.1 controller and PHY, with host and device support
8 PIO state machines

Each state machine is equipped with:

2 32-bit shift registers – either direction, any shift count
2 32-bit scratch registers
4×32-bit bus FIFO in each direction (TX/RX), reconfigurable as 8×32 in a single direction
Fractional clock divider (16 integer, 8 fractional bits)
Flexible GPIO mapping
DMA interface, sustained throughput up to 1 word per clock from system DMA
IRQ flag set/clear/status