Flip Flops

Results: 2
Manufacturer
Texas InstrumentsToshiba Semiconductor and Storage
Series
74HC74LV
Packaging
Cut Tape (CT)Digi-Reel®Tape & Reel (TR)Tube
Function
ResetSet(Preset) and Reset
Output Type
ComplementaryNon-Inverted
Number of Elements
12
Number of Bits per Element
18
Clock Frequency
66 MHz140 MHz
Max Propagation Delay @ V, Max CL
9.3ns @ 5V, 50pF25ns @ 6V, 50pF
Current - Output High, Low
5.2mA, 5.2mA12mA, 12mA
Voltage - Supply
2V ~ 5.5V2V ~ 6V
Current - Quiescent (Iq)
4 µA20 µA
Input Capacitance
2 pF5 pF
Operating Temperature
-40°C ~ 125°C (TA)-40°C ~ 85°C (TA)
Mounting Type
Surface MountThrough Hole
Supplier Device Package
14-SOIC20-DIP
Package / Case
14-SOIC (0.154", 3.90mm Width)20-DIP (0.300", 7.62mm)
Stocking Options
Environmental Options
Media
Marketplace Product
2Results

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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Function
Type
Output Type
Number of Elements
Number of Bits per Element
Clock Frequency
Max Propagation Delay @ V, Max CL
Trigger Type
Current - Output High, Low
Voltage - Supply
Current - Quiescent (Iq)
Input Capacitance
Operating Temperature
Mounting Type
Supplier Device Package
Package / Case
14-SOIC
SN74LV74ADR
IC FF D-TYPE DUAL 1BIT 14SOIC
Texas Instruments
9,007
In Stock
1 : ¥3.37000
Cut Tape (CT)
2,500 : ¥1.18858
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Set(Preset) and Reset
D-Type
Complementary
2
1
140 MHz
9.3ns @ 5V, 50pF
Positive Edge
12mA, 12mA
2V ~ 5.5V
20 µA
2 pF
-40°C ~ 125°C (TA)
Surface Mount
14-SOIC
14-SOIC (0.154", 3.90mm Width)
1,729
In Stock
1 : ¥4.93000
Tube
Tube
Active
Reset
D-Type
Non-Inverted
1
8
66 MHz
25ns @ 6V, 50pF
Positive Edge
5.2mA, 5.2mA
2V ~ 6V
4 µA
5 pF
-40°C ~ 85°C (TA)
Through Hole
20-DIP
20-DIP (0.300", 7.62mm)
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Flip Flops


Flip-flops are elementary digital memory devices capable of storing a single logic state or "bit" of information. They have at least two inputs; one or more to communicate the data to be stored and another to indicate the point in time to store it. Different flip-flop types such as D (delay), SR (Set-Reset), and JK respond differently to the signals presented to their inputs and can be used to implement different logical functions. They differ from latches in that they are edge sensitive devices, whose retained logic state changes only at the moment a valid clock signal is received.