Flip Flops

Results: 2
Packaging
Cut Tape (CT)Digi-Reel®Tape & Reel (TR)
Function
Master ResetSet(Preset) and Reset
Output Type
ComplementaryNon-Inverted
Number of Bits per Element
18
Clock Frequency
200 MHz230 MHz
Max Propagation Delay @ V, Max CL
4.1ns @ 5V, 50pF8.2ns @ 3.3V, 50pF
Current - Output High, Low
24mA, 24mA32mA, 32mA
Voltage - Supply
1.65V ~ 3.6V1.65V ~ 5.5V
Current - Quiescent (Iq)
4 µA10 µA
Input Capacitance
4 pF5 pF
Supplier Device Package
8-VSSOP20-TSSOP
Package / Case
8-VFSOP (0.091", 2.30mm Width)20-TSSOP (0.173", 4.40mm Width)
Stocking Options
Environmental Options
Media
Marketplace Product
2Results

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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Function
Type
Output Type
Number of Elements
Number of Bits per Element
Clock Frequency
Max Propagation Delay @ V, Max CL
Trigger Type
Current - Output High, Low
Voltage - Supply
Current - Quiescent (Iq)
Input Capacitance
Operating Temperature
Mounting Type
Supplier Device Package
Package / Case
8-VFSOP
74LVC1G74DC,125
IC FF D-TYPE SNGL 1BIT 8VSSOP
Nexperia USA Inc.
16,028
In Stock
1 : ¥4.76000
Cut Tape (CT)
3,000 : ¥1.62070
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Set(Preset) and Reset
D-Type
Complementary
1
1
200 MHz
4.1ns @ 5V, 50pF
Positive Edge
32mA, 32mA
1.65V ~ 5.5V
4 µA
4 pF
-40°C ~ 125°C (TA)
Surface Mount
8-VSSOP
8-VFSOP (0.091", 2.30mm Width)
TSSOP20, SOT360
74LVC273PW,118
IC FF D-TYPE SNGL 8BIT 20TSSOP
Nexperia USA Inc.
5,871
In Stock
1 : ¥4.59000
Cut Tape (CT)
2,500 : ¥1.61751
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Master Reset
D-Type
Non-Inverted
1
8
230 MHz
8.2ns @ 3.3V, 50pF
Positive Edge
24mA, 24mA
1.65V ~ 3.6V
10 µA
5 pF
-40°C ~ 125°C (TA)
Surface Mount
20-TSSOP
20-TSSOP (0.173", 4.40mm Width)
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Flip Flops


Flip-flops are elementary digital memory devices capable of storing a single logic state or "bit" of information. They have at least two inputs; one or more to communicate the data to be stored and another to indicate the point in time to store it. Different flip-flop types such as D (delay), SR (Set-Reset), and JK respond differently to the signals presented to their inputs and can be used to implement different logical functions. They differ from latches in that they are edge sensitive devices, whose retained logic state changes only at the moment a valid clock signal is received.