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Si533xx Universal Low Jitter Clock Buffers/Translators Slide 5
What is meant by universal format translation? In short, the Si53302 will accept a wide range of input clock formats, and can then be configured to output any format. The clock input can accommodate CMOS, HSTL, LVDS, LVPECL and HCSL formats, and each input can be up to ten times different in frequency. The output format is pin-configurable, and independent of the input format. In fact, each bank of five differential outputs can be different formats. Each output bank has its own voltage supply pin, and therefore will perform level translation between 1.8, 2.5 and 3.3 V. This means that not only can fewer buffer ICs be used in a clock tree, the user can qualify and maintain fewer buffer ICs across all of their designs. If the output format requirements change, the clock tree design can continue to use the same Si53302, as the format is changed via pin-strapping. Universal format translation means reduced design time and simplified procurement.
PTM Published on: 2013-03-26