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Block Diag

The PN7120 includes an embedded ARM Cortex-M0 MCU core and the following interfaces: clock, power, NCI, and antenna. A clock source is required by the NFC frontend for the RF field generation and signal processing. The clock accuracy is an important factor for reliable operation. Both crystal oscillator and external system clock can be used as a clock source. The PN7120 IC can be supplied by an external power supply or a battery (for handled devices). The PN7120 also implements a low power discovery mode. This feature is intended to reduce the chip power consumption by shortening the polling time. Current consumption can be decreased up to 100 times with no impact on the user experience. Like any NFC chip, it needs to be connected to an external coil antenna through a specific matching/tuning network to generate and maximize the RF field strength. The matching network consists of three main blocks: EMC Filter, Impedance matching circuit, and receiver circuit. The Host interface is based on the NCI over I2C bus slave up to 3.4 MBd. The NFC Forum NCI specification defines a standard interface between an NFC controller and the main host processor of the device. The NCI interface eases the integration of chipsets from different manufacturers, and it defines a common level of functionality and interoperability between components. With NCI, manufacturers have access to a standard interface for any kind of NFC-enabled device they build (including mobile phones, PCs, tablets, printers, consumer electronics, and appliances) and they also reduce time-to-market. The NCI defines a logical interface that can be used with different physical transports such as UART, SPI, and I2C.

PTM Published on: 2016-01-07