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Kinetis-m4-Slide2

The new Kinetis family brings to the general embedded market the most scalable portfolio of Low Power ARM® Cortex™-M4 solutions. NXP has announced over two hundred new derivatives across seven fully scalable families. This slide and the following slide discuss the key benefits of the portfolio for designs. The Cortex-M4 with enhanced DSP capabilities enables developers to optimize their code and reduce the number of cycles needed to execute complex algorithms. This in turn reduces the code size and also improves the power efficiency of the M4 solutions when compared with the M3 core in regards to power consumption. With the Kinetis family being based on a 90nm manufacturing process there is the added value of a huge reduction in dynamic power consumption. The MCU series will consume as little as 200uA/MHz; and in the smaller families the part will consume as little is 500nA in the lowest power stop mode. Since all families will use the same IP; from the entry level 32KB/32pin MK10 series up to the highly integrated K60 featuring 1MB Flash in a 256MAPBGA package, full code reuse exists across the platform. Also, there is full pin compatibility where any parts that are offered in the same package will have consistent layouts of the MCU pins across different packages. This means that any changes in packages will have minimal impact on board redesigns. This includes the leveraging of the broad third party ARM ecosystem. NXP has engaged with key software providers, IAR and Keil, who already have support in place for the Kinetis family, plus NXP is engaging with many other suppliers. This will allow the designers to reuse much of the previous software investment while using the Kinetis family. The Kinetis range is truly the most scalable low power MCU family available, enabling developers to scale from small 32KB Flash Program memory arrays up to large 1MB Flash arrays seamlessly. The second unique feature that the Kinetis family brings to the market is the new 90nm manufacturing process and flash technology that NXP has implemented this family with, known as 90nm Thin-Film-Storage (TSF) memory. Within this technology, NXP has developed what is known as FlexMemory. Completely separate from the Program Flash memory, FlexMemory is a separate block of memory supporting true EEPROM capability within the MCU. Previously, designs would have to use tricky software routines to emulate EEPROM in their Flash technology. With FlexMemory, NXP removes that hurdle by doing it for the designer. In addition, FlexMemory offers more flexibility than traditional standalone EEPROM. Designers have the ability to assign FlexMemory as EEPROM, or additional Program Flash, or a combination of both EEPROM and Program Flash. It is up to the developer to select the best option for the application. FlexMemory, when implemented as EEPROM offers exactly the same functionality, that is, Byte Write/Byte Erase capabilities. This can be achieved in shorter times than with standard EEPROM. FlexMemory also offers higher endurance than standard EEPROM, with the possibility to support up to ten million write erase cycles.

PTM Published on: 2010-12-13