As explained before, Nexperia recommends to place the ESD protection right at the connector to maximize the protection. However, it can be necessary by design to place an ESD device at the PHY. For both cases, Nexperia offers several product families to be considered for the next design. The voltage and capacitance classes match highest signal integrity requirements which Nexperia‘s package options allow enough PCB design flexibility. Please visit the datasheets, applications notes, or Nexperia‘s website for more details.