When a new crystal oscillator is designed, the challenge is to optimize tradeoff between power consumption and reliability. Lowering the RTC current means lower drive current for the crystal. Lower drive current means lower oscillation amplitude. Lower amplitude reduces the ability to sense the oscillation and reduced operating margins. Historical oscillator designs involved enough excess current to handle all of the possible variables of fab process and operating condition. This approach has worked well, but there is excess current being burned under optimum conditions and the drive current may not be able to handle the higher ESR crystals under worse case conditions.