Today, there are two main types of low density programmable logic devices. One type are traditional FPGAs that are made only of volatile SRAM core logic fabrics. In order for a traditional FPGA to function, a configuration bitstream must be downloaded from an external device, usually a PROM or Flash memory chip. This two-chip solution not only adds cost and board space to the system, but also exposes the bitstream to pirating and theft. In contrast, the MachXO2 family of PLDs is built with Lattice’s low-cost, non-volatile process technology. This innovative technology is a combination of SRAM and Flash memory on a single die, giving the user the flexibility and performance of traditional SRAM-based programmable logic as well as the convenience, security and instant-on capability of non-volatile Flash memory for configuration data. The result is a single-chip programmable logic solution that saves cost and board space, is completely functional less than 1mS after power up, and secures the design from theft.