Aging is not a property of capacitor reliability and is not related to the overall lifetime in the application. Aging is a phenomenon where the capacitance changes over time and it is an important factor that designers need to consider when using ceramic capacitors. Aging occurs in all Class II and Class III X7R, X5R, Y5V, and Z5 capacitors from any manufacturer and is related to the material properties of the dielectric. Looking at an example of a 10 µF X7R capacitor, after the PCB reflow process is finished and the part starts cooling down, the aging process timer begins. The capacitance starts to decrease around 3% per decade-hour; this means after 1 hour it will decrease 3%, then again after 10 hours, 100 hours, and so on, as seen in the figure here. Another important factor to consider is DC bias. When a DC voltage is applied to Class II and Class III multilayer ceramic capacitors (MLCCs) like X7R or Y5V, they lose capacitance based on this bias voltage. Here, the designer can use KEMET’s K-SIM tool to estimate the DC bias effect for a given KEMET MLCC.