Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Product List
Slide6

Each series of devices has three sets of nine gains, with the first being an even distribution from 1 to 100, the second from 1 to 1000, and the third from 100 to 1000. The latter set also has a gain of one for calibration purposes. The gain sets were chosen based on research into the most commonly used gains in the applications listed below the set shown here. The tri-state logic levels are based on supply voltage. A signal 80% of Vcc or higher is considered high; less than or equal to 20% of Vcc is a low; and the center region starting at 40% and going to 60% is the high impedance region. Areas in-between these three regions are considered undefined and should be avoided. Note that there are internal 100 k resistors on the logic pins, so leaving the pins floating puts the lines in the high impedance region. For applications without a tri-state driver, the tri-state logic can be driven by a microcontroller, with an I/O pin driving the line high or low if set as an output, or going to high impedance if set as an input. If I/O lines are scarce or create a difficult layout, another solution is to use an I2C mux or digitally controlled potentiometer.

PTM Published on: 2016-03-24