Here is the timing sequence of the phase delay. The SYNCOUT feature of the master IC turns on a 250µA current source at the beginning of its clock cycle and charges up C7. As the voltage rises to 0.7V, the SYNCIN of the slave IC starts its ON pulse. By changing the value of C7, timing can be delayed. If there are more ICs, then the SYNCOUT of the 2nd IC can drive the 3rd and so on.