In PowerArchitect 4, the GUI allows control of the low frequency pole shown here in orange by changing the desired bandwidth of the system. As the bandwidth increases, the DC gain must increase, and thus the frequency of the pole decreases. The two zeros are directly controlled by entering in a value which is a percentage of the LC double pole frequency. They are 40% and 100% of the double pole value. Also the ability to change from real zeros which can be mapped to the s domain to a complex zero which can not. Lastly the high frequency pole allows one to compensate out a capacitor with a low double pole frequency or try to increase phase margin. Please note that in PowerArchitect5 supporting the XRP7724, only the real zero locations and the bandwidth are allowed inputs. Part of the reason is that the XRP7724 is far less likely to require manual input. Second, MaxLinear does not recommend using complex zeros.