Introduction to FPGA Part 1 - What is an FPGA?

2021-11-08 | By ShawnHymel

License: Attribution

A field-programmable gate array (FPGA) is a reconfigurable integrated circuit (IC) that lets you implement a wide range of custom digital circuits. These custom digital circuits can be used to create optimized circuits for things like digital signal processing (DSP), machine learning, and cryptocurrency mining. They are found in many consumer electronics as well as on specialized equipment, such as satellites and communication equipment.

Throughout the series, we will examine how an FPGA works as well as demonstrate the basic building blocks of implementing digital circuits using the Verilog hardware description language (HDL). You will have the opportunity to synthesize and upload your code to a real FPGA.

In this first part, we will look at why you might want to choose an FPGA over other solutions (e.g. microcontrollers) as well as give some examples of where FPGAs are commonly used.

See here if you would like to view this part in video format:

Required Hardware

For this series, you will need the following hardware:

Lattice iCE40 development board. I recommend the iCEstick for this series. However, any of the development boards listed as “supported” by the apio project should work.
Breadboard
Pushbuttons
Jumper wires
(Optional) USB extension cable

If other hardware is needed for a particular episode, it will be listed in the video as well as in the written tutorial.

Reconfigurable Hardware

An FPGA provides a way to implement custom digital logic circuits in a short amount of time using an HDL. Prior to reconfigurable logic ICs, engineers would have to wire up breadboards to test their ideas.

Wiring on a breadboard

Image credits: “breadboard - 1” by Windell Oskay is licensed under CC BY 2.0.

As you can imagine, complex digital designs would create wiring nightmares, and tracking down bugs became nearly impossible. Reconfigurable logic ICs (e.g. CPLDs and FPGAs) offer a way to reduce space, wiring clutter, and debugging effort.

An FPGA is made of many Programmable Logic Blocks (PLBs), each of which contains several Logic Cells. In the FPGA used in the series (the Lattice iCE40HX1K on the iCEstick), each PLB contains 8 cells. This number may change depending on your particular FPGA.

The following diagram (taken from the iCE40LP/HX datasheet) shows the different parts of the iCE40LP/HX FPGA.

FPGA logic blocks and cells

Each cell contains a D flip-flop and a Lookup Table (LUT). We will explore these components in future episodes.

In addition to these blocks, most FPGAs will contain some random access memory (RAM) for short-term storage of data, a phase-locked loop (PLL) to act as a clock multiplier, and some input/output (I/O) banks that allow you to use the various pins as digital inputs or outputs. Some offer additional peripherals, such as dedicated communication blocks (e.g. SPI), analog-to-digital converters (ADCs), or even on-chip central processing units (CPUs) for running sequential code.

When you “program” an FPGA, you tell it how to connect these various blocks and peripherals together to implement your digital circuit!

What Is It Good For?

Making designs for an FPGA is an intermediate or advanced engineering topic, as you need to have a fundamental understanding of digital circuits, which includes logic gates, binary, and boolean algebra.

Important! This series assumes you have some basic knowledge of digital circuits. We will focus on implementing these designs in an HDL, testing them through simulation, and uploading them to an FPGA.

In many cases, you will often find that a microcontroller or microprocessor (e.g. single board computer) can get the job done for less effort. However, there are a number of applications where you need to have reconfigurable digital logic. Let’s look at a few examples:

Parallel I/O operations - You need to control a lot of hardware very quickly, such as displays made up of thousands or millions of LEDs. These LED cubes offer silky smooth frame rates because they’re being controlled by FPGAs. A CPU would struggle to feed the required data to all of the LEDs (or driver chips) that fast.
Data acquisition (DAQ) - You can create custom digital logic that samples and buffers sensor data very quickly, which can then be read by a CPU later for analysis. For example, the Digilent Analog Discovery 2 uses a Xilinx FPGA to sample and buffer data from its oscilloscope and logic analyzer front end circuitry.
Specialized computations - Depending on the application, digital circuits can often be configured to perform specific math operations much faster than a CPU, which is configured to execute generic operations (e.g. math, load, store). As a result, you’ll often see FPGAs used in digital signal processing (DSP), which sometimes requires calculations to be performed at rates much faster than what current CPUs can do. You’ll also see them used in areas like cryptocurrency mining and machine learning.
Custom processor - Because an FPGA allows you to build an almost limitless number of digital circuits, you can actually implement one or more CPUs in an FPGA. This offers the ability to create customized CPUs if you can’t find one on the market that meets your needs. For example, you might take a RISC-V CPU implementation and add a special instruction to execute a divide-and-accumulate operation in a single clock cycle.

Because you can reconfigure it in the field, the FPGA makes for a fantastic prototyping tool. You can tweak and refine your digital circuit until it meets your requirements. If you plan to produce more than a few thousand units of your final product, you might consider turning your custom digital circuit into an application-specific integrated circuit (ASIC). With an ASIC, your digital circuit design is permanently etched into an integrated circuit (“chip”) that you can include in your product. However, the tooling costs for an ASIC might be prohibitive.

If you plan to produce less than a few thousand units of your product, you might consider just adding the FPGA to your design, as Mercedes-Benz did in one of their infotainment consoles.

Design Flow

The following diagram shows a typical process for creating a design for an FPGA. If you are used to programming for computers or microcontrollers, you will notice that the naming of the steps are different (e.g. there is no “compile” step) than what you might be used to.

Design flow for using an FPGA

Note that each step lists the tool we plan to use throughout this series.

HDL Coding - Rather than wire up physical components on a breadboard or spin a custom PCB for discreet digital logic parts, you will describe your design in an HDL. The three most popular hardware description languages are VHDL, Verilog, and SystemVerilog. We will use Verilog in this series (as it is the only language fully supported by the rest of the tool suite at this time).
Simulation - Prior to building and uploading your design to a real FPGA, you will often want to simulate the design to ensure that everything works. This step involves writing more HDL to toggle the inputs and clock signals so that you can observe the output behavior in a simulation program. The test HDL code is known as a "testbench." We will write testbenches in Verilog and simulate the design in gtkwave.
Synthesis - As HDL is not a procedural language (i.e. your code does not execute sequentially in a processor), it cannot be “compiled.” Rather, the process of “synthesis” takes your HDL code and converts it into gate-level representations that can be understood by the FPGA. In essence, it converts your code into a digital circuit. We will use the yosys tool for synthesis.
Place and Route (PNR) - The output of synthesis is only the structure of the circuit needed to realize your design (as detailed in HDL). The PNR tool figures out exactly how to connect the various parts inside your particular FPGA to make this happen. The process is similar to using an autorouter in a PCB design program. We will use nextpnr as our PNR tool.
Package - The output of the PNR tool is a human-readable ASCII file that details what connections need to be made among the components inside the FPGA. The package tool converts the ASCII file into a binary file that can be read by the FPGA’s on-chip configuration process. For this process, we will use icepack, which is part of the Project IceStorm toolset.
Upload - Finally, the binary file must be uploaded to the FPGA. Note that most modern FPGAs do not contain onboard, non-volatile flash memory. As a result, the binary file is usually uploaded to aflash memory chip on the same PCB as the FPGA. On boot, the FPGA reads the stored binary data in order to configure its logic cells. We will use iceprog (also part of Project IceStorm) to upload our synthesized and routed design to the FPGA.

Don’t worry! You won’t need to install and use these tools individually. We will rely on the open-source and cross-platform tool apio to help manage these tools. As an analogy, if yosys is like avr-gcc, then apio is like the Arduino IDE. Apio is specifically made to work with popular iCE40 development boards, and it makes the building/uploading process much easier so that we can focus on learning the building blocks of FPGA design.

Recommended Reading

All demonstrations and solutions for this series can be found in this GitHub repository.

You can learn more about the apio tool on their documentation site.