Examples using Always Block - Part 13 of our Verilog Series

2024-03-15 | By DWARAKAN RAMANATHAN

Examples:

Combinational circuits are digital circuits where the output is solely determined by the current inputs, without any consideration for previous states. In Verilog, you can use "always" blocks to model combinational logic. Here are a few examples of combinational circuits using "always" blocks:

1. 2-to-1 Multiplexer:

A 2-to-1 multiplexer selects one of two inputs (A or B) based on a control signal (S).

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module mux_2to1 (  
input wire A,  
input wire B,  
input wire S,  
output wire Y );  
always @* begin  
if (S == 0) Y = A;  
else Y = B;  
end  
endmodule

In this example, the "always" block continuously evaluates the value of the control signal S and selects either A or B as the output Y.

2. 4-to-1 Multiplexer:

A 4-to-1 multiplexer selects one of four inputs (A, B, C, or D) based on a 2-bit control signal (S1 and S0.)

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module mux_4to1 (  
input wire [3:0] data,  
input wire [1:0] select,  
output wire Y );  
always @* begin  
case (select)  
‎2'b00: Y = data[0];  
‎2'b01: Y = data[1];  
‎2'b10: Y = data[2];  
‎2'b11: Y = data[3];  
default: Y = 1'bx; // Handle unspecified cases  
endcase  
end  
endmodule

In this example, the "always" block uses a case statement to select one of the four data inputs based on the 2-bit control signal select.

3. Binary Adder:

A binary adder computes the sum of two binary numbers (A and B) along with a carry input (Cin).

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module binary_adder (  
input wire [3:0] A,  
input wire [3:0] B,  
input wire Cin,  
output wire [3:0] Sum,  
output wire Cout );  
always @* begin  
‎{Cout, Sum} = A + B + Cin;  
end  
endmodule

In this example, the "always" block performs binary addition using the + operator to compute the sum Sum and carry out Cout.

4. 4-Bit Comparator:

A 4-bit comparator compares two 4-bit inputs (A and B) and produces output signals indicating whether A is greater than, equal to, or less than B.

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module comparator_4bit (  
input wire [3:0] A,  
input wire [3:0] B,  
output wire gt, // A > B  
output wire eq, // A == B  
output wire lt // A < B );  
always @* begin  
if (A > B) begin  
gt = 1;  
eq = 0;  
lt = 0;  
end  
else if (A == B) begin  
gt = 0;  
eq = 1;  
lt = 0;  
end  
else begin  
gt = 0;  
eq = 0;  
lt = 1;  
end  
end  
endmodule

In this example, the "always" block compares each corresponding pair of bits in A and B to determine whether A is greater than, equal to, or less than B.

5. Priority Encoder:

A priority encoder takes multiple inputs and encodes the highest-order active input into a binary output.

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module priority_encoder (  
input wire [7:0] inputs,  
output wire [2:0] encoded );  
always @* begin  
case(inputs)  
‎8'b0000_0001: encoded = 3'b000;  
‎8'b0000_0010: encoded = 3'b001;  
‎8'b0000_0100: encoded = 3'b010;  
‎8'b0000_1000: encoded = 3'b011;  
‎8'b0001_0000: encoded = 3'b100;  
‎8'b0010_0000: encoded = 3'b101;  
‎8'b0100_0000: encoded = 3'b110;  
‎8'b1000_0000: encoded = 3'b111;  
default: encoded = 3'bx; // Handle unspecified cases 
endcase  
end  
endmodule

This example demonstrates a priority encoder that encodes the highest-order active input into a 3-bit binary code.

6. Barrel Shifter:

A barrel shifter can shift a binary number left or right by a specified number of positions.

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module barrel_shifter (  
input wire [7:0] data,  
input wire [2:0] shift_amount,  
input wire shift_left, 
output wire [7:0] shifted_data );  
always @* begin  
if (shift_left) begin  
shifted_data = data << shift_amount;  
end  
else begin  
shifted_data = data >> shift_amount;  
end  
end  
endmodule

In this example, the "always" block performs left or right shifts on the input data based on the shift direction and amount specified by the inputs.

Conclusion:

In conclusion, the examples of advanced combinational circuits implemented using "always" blocks in Verilog showcase the versatility and power of this hardware description language for modeling complex digital logic. These examples demonstrate the precision and flexibility of Verilog's "always" blocks for modeling intricate combinational logic circuits. Verilog's ability to describe such circuits accurately makes it an indispensable tool for hardware designers, allowing them to design, simulate, and verify digital systems with confidence and efficiency.