Power Requirements and Supply Solutions for FPGAs

Field-Programmable Gate Arrays (FPGAs) are found at the heart of many prototypes and low-to-mid-volume products. The primary advantages of FPGAs are flexibility during development, simple-upgrade paths, faster time-to-market, and relatively low cost. A key downside is complexity, with the FPGA often incorporating a sophisticated System-on-Chip (SoC).

Such complexity makes tough demands on the power supply. To meet these challenges, the power supply requires several outputs and a combination of switching regulators for efficiency and linear regulators for clean power.

This article describes the special power requirements of FPGAs, explains how to design a power supply for these clever chips, and then reviews a selection of power modules targeted at FPGA applications.

Calculating system power

Powering an FPGA can seem like powering an entire system. The power supply design engineer is faced with the challenge of supplying from three to 15 voltage rails (and sometimes even more); and that’s only the start. FPGAs are typically fabricated using the latest wafer-fabrication techniques that require a low-core voltage, but the power supply also has to be powering multiple rails for specialty blocks and circuitry, provide multiple voltage levels, supply extra current for high-power blocks, and satisfy the requirements of noise-sensitive elements.

Just to make things a little more complex, even FPGAs from the same manufacturer can vary greatly, making it critical that the engineer chooses the best power supply for each chip. That choice depends on factors such as the voltage and power demands for each rail, the rails’ sequencing requirements, and system power-management needs.

The first step in designing an FPGA power supply is to identify the individual voltage rails and their requirements. The FPGA vendor usually supplies a “pin list” that specifies the voltage level for each powered pin that connects to a voltage rail in the device. For example, Table 1 shows some of the voltage rails for Altera’s Stratix IV GX FPGA.

Table 1: A subset of the voltage rails for an Altera Stratix IV GX. (Courtesy of Altera)

From Table 1 it can be seen that the FPGA’s rails run at several different voltages depending on the block being powered. Requirements typically comprise the core (powering the internal logic arrays), I/O (driving the I/O buffers which can be grouped in banks, each operating from a different voltage), phase-locked loop (PLL) (powering the PLL in the core), and transceiver (supplying the digital and analog circuitry of the transceiver, receiver, and transmitter).

Once the individual voltage rails have been identified, the next step is to calculate the current consumption for each rail in turn. The current draw for shared rails should be added to the rail under analysis to come up with a total for that rail. FPGA manufacturers often provide online calculators for this purpose. Next, the engineer should add up the power consumption of all the elements making up the FPGA in order to accurately estimate the power consumption of the entire chip.

After calculating the power consumption, the next step is to check the specification for voltage-variation tolerance and maximum-voltage ripple for each rail. These parameters can usually be found in the FPGA’s data sheet.

The load-regulation specification identifies the range (in mV) within which the voltage-regulator output may deviate for changes in load. A typical specification for load regulation is ±5 mV, if the supply is derived from a switching DC-DC voltage converter (“switching regulator”). This is just a 0.4 percent deviation if the voltage rail is specified at 1.2 V.

The voltage ripple is measured from peak-to-peak in mV and its magnitude relies on the design of the voltage regulator supplying the particular rail under analysis. Output filtering heavily influences voltage-(and current) ripple performance. (See the TechZone article “Capacitor Selection is Key to Good Voltage Regulator Design”.) Most FPGAs tolerate a voltage ripple of up to 2 percent or better of the rail voltage, which is well within the capability of modern switching regulators.

Switching or linear regulator?

The next step in the FPGA power supply design process is to decide if a particular rail should be powered by a switching regulator or a linear regulator. Special attention is required for the analog-power rails that supply noise-sensitive circuits, such as the PLL and transceiver circuits. Excess noise on these rails could compromise circuit performance.

Linear regulators provide ripple-free power, feature fast response, are simpler to use, and take less space than a switching device. They are a good choice for the noise-sensitive PLL and transceiver rails. The major downside is a lack of efficiency, particularly if the output voltage is a lot lower than the input.

Switching regulators are a better choice for higher-power rails where their greater efficiency is more important than lower noise. They are a good choice for powering the digital-core logic and I/Os of the FPGA, where current requirements can easily run up to tens of amps. The downside of a switching regulator is that it is more complex, larger, and requires more external components. (See the TechZone article “Understanding the Advantages and Disadvantages of Linear Regulators”.)

The resulting power supply can be somewhat complex, comprising several switching regulators and linear regulators in a “power tree” (Figure 2).

Figure 2: FPGA power supply comprising switching and linear regulators. (Courtesy of Altera)

FPGA power modules

A power supply for a FPGA typically comprises a combination of switching and linear regulators working together to supply the different voltages and stable power with reasonable efficiency. Designing such a supply is not trivial, but things can be made much simpler by basing the circuits around power modules that integrate several switching and linear regulators into a single chip.

Maxim’s MAX8660 power module, for example, incorporates four switching regulators (running at 2 MHz and thus encouraging the use of small inductors) and four linear regulators. The switching regulators automatically switch from pulse width modulation (PWM) to light-load operation to reduce operating current and extend battery life.

The device offers output voltages ranging from 0.725-3.3 V (0.4-1.6 A) for the switching regulators and 1.7-3.3 V (30-500 mA) for the low-drop-out (LDO) linear regulators all operating from a 2.6 to 6 V input.

The chip also incorporates power-management capabilities and functions such as on/off control for outputs, low-battery detection, reset output, and a two-wire I²C serial interface.

Intersil offers its ISL9440 for smaller FPGA applications. The chip combines three switching regulators with one LDO linear regulator. Each output is adjustable down to 0.8 V and the device operates from a 4.5-24 V supply.

The ISL9440 offers internal soft-start and independent-enable inputs for ease of supply rail sequencing in a compact 5 x 5 mm QFN package. The chip employs internal-loop compensation to minimize peripheral components for compact design and a low total-solution cost.

Texas Instruments (TI) also offers power modules that combine the efficiency of switching regulators with the noise-free supply of linear regulators. For example, the LM26480 (Figure 3) integrates two 1.5 A step-down (“buck”) switching regulators and two 300 mA linear regulators. The device operates from a 2.8 to 5.5 V supply and the first switching regulator supplies 0.8-2 V at 1.5 A while the second provides 1.0-3.3 V at 1.5 A. The 2 MHz switching regulators operate at up to 96 percent efficiency. The linear regulators supply 1-3.5 V at up to 300 mA.

Figure 3: Texas Instruments’ LM26480 integrates two switching regulators with two linear regulators.

For more information on the parts discussed in this article, use the links provided to access product pages on the DigiKey website.

Further reading

1. “Choose the Right Power Supply for Your FPGA,” Viral Vaidya, Application Note 5447, Maxim Integrated, October 2012.
2. “Voltage Regulator Selection for FPGAs,” Altera white paper, November 2008.