Flip Flops

Results: 3
Packaging
Cut Tape (CT)Digi-Reel®Tape & Reel (TR)Tube
Product Status
ActiveObsolete
Type
D-TypeJK Type
Supplier Device Package
14-TSSOP16-TSSOP
Package / Case
14-TSSOP (0.173", 4.40mm Width)16-TSSOP (0.173", 4.40mm Width)
Stocking Options
Environmental Options
Media
Marketplace Product
3Results

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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Function
Type
Output Type
Number of Elements
Number of Bits per Element
Clock Frequency
Max Propagation Delay @ V, Max CL
Trigger Type
Current - Output High, Low
Voltage - Supply
Current - Quiescent (Iq)
Input Capacitance
Operating Temperature
Mounting Type
Supplier Device Package
Package / Case
14-TSSOP
CD4013BPWR
IC FF D-TYPE DUAL 1BIT 14TSSOP
Texas Instruments
18,096
In Stock
1 : ¥3.66000
Cut Tape (CT)
2,000 : ¥1.29090
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Set(Preset) and Reset
D-Type
Complementary
2
1
24 MHz
90ns @ 15V, 50pF
Positive Edge
6.8mA, 6.8mA
3V ~ 18V
4 µA
5 pF
-55°C ~ 125°C (TA)
Surface Mount
14-TSSOP
14-TSSOP (0.173", 4.40mm Width)
16-TSSOP
CD4027BPWR
IC FF JK TYPE DUAL 1BIT 16TSSOP
Texas Instruments
4,575
In Stock
1 : ¥4.25000
Cut Tape (CT)
2,000 : ¥1.49050
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Set(Preset) and Reset
JK Type
Complementary
2
1
24 MHz
90ns @ 15V, 50pF
Positive Edge
6.8mA, 6.8mA
3V ~ 18V
4 µA
5 pF
-55°C ~ 125°C (TA)
Surface Mount
16-TSSOP
16-TSSOP (0.173", 4.40mm Width)
14-TSSOP
CD4013BPW
IC FF D-TYPE DUAL 1BIT 14TSSOP
Texas Instruments
8,814
In Stock
1 : ¥9.69000
Tube
Tube
Obsolete
Set(Preset) and Reset
D-Type
Complementary
2
1
24 MHz
90ns @ 15V, 50pF
Positive Edge
6.8mA, 6.8mA
3V ~ 18V
4 µA
5 pF
-55°C ~ 125°C (TA)
Surface Mount
14-TSSOP
14-TSSOP (0.173", 4.40mm Width)
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Flip Flops


Flip-flops are elementary digital memory devices capable of storing a single logic state or "bit" of information. They have at least two inputs; one or more to communicate the data to be stored and another to indicate the point in time to store it. Different flip-flop types such as D (delay), SR (Set-Reset), and JK respond differently to the signals presented to their inputs and can be used to implement different logical functions. They differ from latches in that they are edge sensitive devices, whose retained logic state changes only at the moment a valid clock signal is received.