Analog to Digital Converters (ADC)

Results: 2
Number of Bits
1012
Sampling Rate (Per Second)
3M-
Number of Inputs
12
Input Type
Differential, Single EndedSingle Ended
Data Interface
ParallelSPI
Configuration
S/H-ADCS/H-MUX-ADC
Ratio - S/H:ADC
1:12:1
Architecture
PipelinedSAR
Reference Type
External, InternalInternal
Voltage - Supply, Analog
2.7V ~ 3.6V+4.5V ~ 7V, -12V ~ 16.5V
Voltage - Supply, Digital
2.7V ~ 3.6V+4.5V ~ 7V, -12V ~ 16.5V
Features
-Simultaneous Sampling
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width) Exposed Pad20-CDIP (0.300", 7.62mm)
Supplier Device Package
10-MSOP-EP20-CDIP
Mounting Type
Surface MountThrough Hole
Stocking Options
Environmental Options
Media
Marketplace Product
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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Number of Bits
Sampling Rate (Per Second)
Number of Inputs
Input Type
Data Interface
Configuration
Ratio - S/H:ADC
Number of A/D Converters
Architecture
Reference Type
Voltage - Supply, Analog
Voltage - Supply, Digital
Features
Operating Temperature
Package / Case
Supplier Device Package
Mounting Type
10 MSOP EP
LTC1407CMSE-1#PBF
IC ADC 12BIT PIPELINED 10MSOP
Analog Devices Inc.
510
In Stock
1 : ¥99.21000
Tube
-
Tube
Active
12
3M
2
Differential, Single Ended
SPI
S/H-MUX-ADC
2:1
1
Pipelined
External, Internal
2.7V ~ 3.6V
2.7V ~ 3.6V
Simultaneous Sampling
0°C ~ 70°C
10-TFSOP, 10-MSOP (0.118", 3.00mm Width) Exposed Pad
10-MSOP-EP
Surface Mount
20-CDIP
AD573KD
IC ADC 10BIT SAR 20CDIP
Analog Devices Inc.
0
In Stock
Check Lead Time
4 : ¥1,458.51250
Tube
-
Tube
Active
10
-
1
Single Ended
Parallel
S/H-ADC
1:1
1
SAR
Internal
+4.5V ~ 7V, -12V ~ 16.5V
+4.5V ~ 7V, -12V ~ 16.5V
-
0°C ~ 70°C
20-CDIP (0.300", 7.62mm)
20-CDIP
Through Hole
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of 2

Analog to Digital Converters (ADC)


Analog-to-digital converters (ADC, A/D, or A-to-D) sample an analog signal, such as a sound picked up by a microphone or the output of a sensor, into a digital signal. Typically, the digital output is a two's complement binary number that is proportional to the input. Input types may be differential, pseudo differential or single-ended. ADCs are selected by number of bits, sampling rate, number of inputs, interface, number of converters, and the architecture such as adaptive delta, dual slope, folding, pipelined, SAR, Sigma-Delta or two-step.