Starting with the Spartan®-3 FPGA family, 90 nm became the first process node where power (particularly from leakage) became a major focus. Using process, architectural, and software innovations, AMD has made major advances at the 45 nm process node in Spartan-6 FPGAs, reducing static, dynamic, and I/O power significantly over previous generations of FPGAs. Comparing Spartan-6 to Spartan-3A FPGAs, the average static power in Spartan-6 devices is 50% lower and dynamic power is 40% lower. Additionally there has been I/O power improvements in the form of dynamic termination.